At high temperature SOI transistors have much lower leakage currents than bulk MOSFETs. In addition, fully depleted devices have a 2 to 3 times lower variation of the threshold voltage with temperature than bulk devices. Finally, electrical current cannot flow to the substrate. It can only flow in the branches of the circuits (where it is supposed to flow). As a result, SOI circuits can be operated at temperatures up to 400°C.
Here's the leakage current in p-channel MOSFETs (bulk and SOI). See the difference at
In bulk devices, the leakage currents go from the supply rail (Vdd) to the substrate
(Vss). In the case of SOI, the currents still flow through the devices.
This is the example of a NAND gate. In bulk, the leakage current is the SUM of all
leakage currents. In SOI, the leakage current is fixed by the leakage of the LEAST LEAKY
device of the branch...
Here's the threshold voltage variation of p-channel SOI and bulk MOSFETs. The variation
is 2-3 times smaller in SOI than in bulk devices.
This is the bode diagram of an SOI OTA (Operational Transconductance Amplifier). The
gain at room temperature is 115 dB, and it still is 50 dB at 400°C. Try to do this using
Here is the sensitivity of an SOI magnetic sensor as a function of temperature.
"Design Techniques for High-Speed Low-Power and High-Temperature Digital CMOS Circuits on SOI", D. Flandre, C. Jacquemin and J.P. Colinge, Proceedings IEEE International SOI Conference, p. 164, 1992
"High-temperature applications of SIMOX trechnology", A.J. Auberton-Hervé,
J.P. Colinge and D. Flandre, Japanese Solid State Technology, pp. 12-17, Dec. 1993 (In
"High-Temperature Gate Capacitances of Thin-Film SOI MOSFETs", B. Gentinne, D. Flandre, J.P. Colinge and F. Van de Wiele, Proceedings of the 23rd European Solid-State Device Research Conference (ESSDERC), p.687, 1993
"Demonstration of the potential of accumulation-mode MOS transistors on SOI substrates for high-temperature operation (150-300°C)", D. Flandre, A. Terao, P. Francis, B. Gentinne, J.P. Colinge, IEEE Electron Device Letters, vol. 14, p. 10, 1993
"High-temperature characteristics of CMOS devices and circuits on
Silicon-on-Insulator (SOI) substrates" (invited paper), D. Flandre and J.P. Colinge,
Proceedings of IX SBMICRO 94, Rio de Janeiro, pp. 777-786, 1994
"SOI CMOS operational amplifiers for applications up to 300°C", JP Eggermont, B. Gentinne, D. Flandre, P.G.A. Jespers and JP Colinge, Transactions of the Second International High Temperature Electronics Conference, Charlotte NC, pp. II-21 - II-26, June 1994
"Tungsten metallization for high-temperature SOI devices", J. Chen and J.P. Colinge, paper E-I.4, European Materials Research Society, Strasbourg, France, 1994, and Materials Science and Engineering, vol. B29, pp.18-20, 1995
"CMOS SOI magnetic field sensors for applications up to 600K", J.P.
Eggermont, D. Flandre, J.P. Colinge, Transactions of the Third International High
Temperature Electronics Conference (HiTEC), Volume 1, Albuquerque, NM, pp. X.3-X.8, June
"Tungsten metallization system with TiN/TiSi2 contact structure for thin film SOI devices", J. Chen, J.P. Colinge, Transactions of the Third International High Temperature Electronics Conference (HiTEC), Volume 1, Albuquerque, NM, pp. V.27-V.31, June 1996
"Fully depleted SOI-CMOS technology for high-temperature IC applications, B. Gentinne, J.P. Eggermont, D. Flandre and J.P. Colinge, EMRS Spring Meeting, Symposium A, June 1996
B. Gentinne, D. Flandre, J.-P. Colinge, F. Van de Wiele, "Measurement and
two-dimensional simulation of thin-film SOI MOSFETs intrinsic gate capacitances at
elevated temperatures", Solid-State Electronics, 39 (1996), pp.
"Design of SOI CMOS operational amplifiers for applications up to 300°C", J.P. Eggermont, D. De Ceuster, D. Flandre, B. Gentinne, P.G.A. Jespers and J.P. Colinge, IEEE J. Solid-State Circuits, vol. 31-2 (1996), pp. 179-186
B. Gentinne, J.-P. Eggermont, D. Flandre and J.-P. Colinge, "Fully-depleted SOI-CMOS technology for high temperature IC applications", Materials Science and Engineering - B, 46 (1997), pp. 1-7.
D. Flandre, "Silicon-on-insulator technology for high temperature metal oxide semiconductor devices and circuits", in the book "High-temperature electronics", IEEE Press., Ed. R. Kirschman, 1998, pp. 303-308.
A. Viviani, D. Flandre, P. Jespers, "A high-temperature sigma-delta modulator in thin-film fully-depleted SOI technology", IEE Electronics Letters, 35 (1999), pp. 749-751.
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